diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2012-04-18 15:47:32 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-05-02 19:52:37 +0200 |
| commit | 7a3f36a228eeb30acb9f3adde2798e9f401849d2 (patch) | |
| tree | a175367bcd4783c52e65b30160639d208c4d021c /src/northbridge/intel/sandybridge/Makefile.inc | |
| parent | 4aca5d7e66178c11c15d29fb439622c93680c06c (diff) | |
Sandybridge: Display platform information early
It is important to have the system configuration reported as early as
possible to have a better idea what exact chipset the platform is
running with.
This change adds code to have an early coreboot module report the CPU
and PCH information. CPU info includes the 32 bit feature information
word, the symbolic processor brand string, and information about some
features support, as obtained through CPUID instructions.
The PCH information includes the symbolic device name and PCI device
version.
Change-Id: If6c21ad5ffb76d7d57d89f4f87d04bdd7192480a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/975
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index b72e9fa38f..79aa6ea42c 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -25,6 +25,7 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c romstage-y += udelay.c romstage-y += raminit.c romstage-y += early_init.c +romstage-y += report_platform.c romstage-y += ../../../arch/x86/lib/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c |