diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-10 02:36:04 +0100 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-02-12 17:09:05 +0100 |
commit | 144eea069726903d157f67a2f886dff4575d9b19 (patch) | |
tree | 995376822269c860e71fbae390a970fab3d587a7 /src/northbridge/intel/sandybridge/Makefile.inc | |
parent | c37c7c8b1f3977e362e05945a48ddecf803e20a7 (diff) |
Make MRC vs native a config rather than making a separate chipset for it.
Tested by making lenovo x230 configurable despite pretty MRC bugs.
Change-Id: Ia2a123f24334f5cd5f42473b7ce7f3d77c0e65b7
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13658
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
-rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 90abe4dab6..7a3c498b2c 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -13,7 +13,7 @@ # GNU General Public License for more details. # -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC),y) +ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y) ramstage-y += ram_calc.c ramstage-y += northbridge.c @@ -25,12 +25,12 @@ ramstage-y += acpi.c ramstage-y += mrccache.c romstage-y += ram_calc.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC) += raminit_mrc.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC) += raminit_mrc.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += raminit.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ../../../device/dram/ddr3.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += raminit.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ../../../device/dram/ddr3.c +ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y) +romstage-y += raminit.c +romstage-y += ../../../device/dram/ddr3.c +else +romstage-y += raminit_mrc.c +endif romstage-y += romstage.c romstage-y += mrccache.c romstage-y += iommu.c |