diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-04 00:08:51 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-05 20:59:31 +0200 |
| commit | 00636b0daefc3c499990744226a0e1a316d71731 (patch) | |
| tree | 4360fe7a5817a4d6c2164daf547b7d9ba5bd46a8 /src/northbridge/intel/sandybridge/Makefile.inc | |
| parent | 4dd3853437a3506880e2879e6640d455778f6413 (diff) | |
Add support for Intel Sandybridge CPU (northbridge part)
Change-Id: I06228ecf9cac931ad34e32871d5a4f2a4857b2ac
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/854
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc new file mode 100644 index 0000000000..9e7568c812 --- /dev/null +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -0,0 +1,41 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2010 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +driver-y += northbridge.c +driver-y += gma.c + +ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c + +romstage-y += udelay.c +romstage-y += raminit.c +romstage-y += early_init.c +romstage-y += ../../../arch/x86/lib/walkcbfs.S + +smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c + +# We don't ship that, but booting without it is bound to fail +cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin +mrc.bin-file := $(CONFIG_MRC_FILE) +ifeq ($(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y) +mrc.bin-position := 0xfffa0000 +endif +ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y) +mrc.bin-position := 0xfffe0000 +endif +mrc.bin-type := 0xab |