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authorElyes Haouas <ehaouas@noos.fr>2024-06-01 18:12:16 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-07-10 12:55:46 +0000
commite7fa24470dc3b3403eabd757a87cfb993f316b1a (patch)
tree6497bd70076905089fc81ed777cbec34486569c0 /src/northbridge/intel/pineview
parenta9997f891facaf3c855d7f2c9c6840acbf101193 (diff)
cbmem_top: Change the return value to uintptr_t
Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/pineview')
-rw-r--r--src/northbridge/intel/pineview/memmap.c4
-rw-r--r--src/northbridge/intel/pineview/northbridge.c6
2 files changed, 4 insertions, 6 deletions
diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c
index 967a59fad0..de2d8400d2 100644
--- a/src/northbridge/intel/pineview/memmap.c
+++ b/src/northbridge/intel/pineview/memmap.c
@@ -86,13 +86,11 @@ void smm_region(uintptr_t *start, size_t *size)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- uintptr_t top_of_ram;
-
/*
* Cache 8 MiB region below the top of RAM and 2 MiB above top of RAM to cover both
* CBMEM and the TSEG region.
*/
- top_of_ram = (uintptr_t)cbmem_top();
+ const uintptr_t top_of_ram = cbmem_top();
postcar_frame_add_mtrr(pcf, top_of_ram - 8 * MiB, 8 * MiB, MTRR_TYPE_WRBACK);
postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(), northbridge_get_tseg_size(),
MTRR_TYPE_WRBACK);
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index c24493aa2b..573f1a8604 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -69,7 +69,7 @@ static void mch_domain_read_resources(struct device *dev)
/* Report the memory regions */
ram_range(dev, index++, 0, 0xa0000);
- ram_from_to(dev, index++, 1 * MiB, (uintptr_t)cbmem_top());
+ ram_from_to(dev, index++, 1 * MiB, cbmem_top());
uintptr_t tseg_base;
size_t tseg_size;
smm_region(&tseg_base, &tseg_size);
@@ -77,8 +77,8 @@ static void mch_domain_read_resources(struct device *dev)
mmio_range(dev, index++, gtt_base, gsm_size);
mmio_range(dev, index++, igd_base, gms_size);
printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%lx\n",
- tseg_base - (uintptr_t)cbmem_top());
- reserved_ram_from_to(dev, index++, (uintptr_t)cbmem_top(), tseg_base);
+ tseg_base - cbmem_top());
+ reserved_ram_from_to(dev, index++, cbmem_top(), tseg_base);
/*
* If > 4GB installed then memory from TOLUD to 4GB