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authorElyes HAOUAS <ehaouas@noos.fr>2020-02-16 10:01:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-24 14:10:00 +0000
commit2119d0ba4345a19b9db7dc13e36f3fa57f75d234 (patch)
treeaeeef324906730e350c338edb4f5704f20a95385 /src/northbridge/intel/pineview
parentebdf298ec2dd84810a37a4aac154200b2102b394 (diff)
treewide: Capitalize 'CMOS'
Change-Id: I1d36e554618498d70f33f6c425b0abc91d4fb952 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38928 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Peter Lemenkov <lemenkov@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/pineview')
-rw-r--r--src/northbridge/intel/pineview/early_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index c3cd380dc5..8f925f71d7 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -43,7 +43,7 @@ static void early_graphics_setup(void)
pci_write_config8(D0F0, DEVEN, BOARD_DEVEN);
- /* vram size from cmos option */
+ /* vram size from CMOS option */
if (get_option(&reg8, "gfx_uma_size") != CB_SUCCESS)
reg8 = 0; /* 0 for 8MB */
/* make sure no invalid setting is used */