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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-02 18:00:29 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:08:03 +0000
commit065857ee7fd61b05025d7a803e82f2b9b53cbc9a (patch)
tree3016bedfeac37b6aca649f1474f6343228ae9673 /src/northbridge/intel/pineview
parentbdaec07a859c0c05e7fd5276a15b3933da574368 (diff)
arch/io.h: Drop unnecessary include
Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/pineview')
-rw-r--r--src/northbridge/intel/pineview/bootblock.c1
-rw-r--r--src/northbridge/intel/pineview/northbridge.c1
-rw-r--r--src/northbridge/intel/pineview/ram_calc.c1
-rw-r--r--src/northbridge/intel/pineview/stage_cache.c1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index f3eab492f5..bd76fb933c 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_ops.h>
#define PCIEXBAR 0x60
#define MMCONF_256_BUSSES 16
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 94aed89fc2..5ddcd73cea 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -16,7 +16,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c
index cf9db988e1..a789956ea3 100644
--- a/src/northbridge/intel/pineview/ram_calc.c
+++ b/src/northbridge/intel/pineview/ram_calc.c
@@ -16,7 +16,6 @@
#define __SIMPLE_DEVICE__
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/intel/pineview/stage_cache.c b/src/northbridge/intel/pineview/stage_cache.c
index 3e2f882827..6f949e69bd 100644
--- a/src/northbridge/intel/pineview/stage_cache.c
+++ b/src/northbridge/intel/pineview/stage_cache.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <device/pci.h>
#include <stage_cache.h>