aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/pineview/early_init.c
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-06-08 12:38:19 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-06-10 01:52:51 +0000
commit26766fd85d87dcd328ca55c8a51a43222eca59f1 (patch)
treeb71e4751e3d2bd73a28300ed095cdb1be16dd12e /src/northbridge/intel/pineview/early_init.c
parenta4098c759dca00ef47c821032a5effe572083645 (diff)
nb/intel/pineview: Use PCI bitwise ops
Tested with BUILD_TIMELESS=1, Foxconn D41S does not change. Change-Id: Idd6a11e95669f0a8fe9bd52359a9822b524c878c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42192 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/pineview/early_init.c')
-rw-r--r--src/northbridge/intel/pineview/early_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index 5b9ef4d3fd..42a68d8c02 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -62,8 +62,8 @@ static void early_graphics_setup(void)
pci_write_config16(GMCH_IGD, 0xcc, reg16);
- pci_write_config8(GMCH_IGD, 0x62, pci_read_config8(GMCH_IGD, 0x62) & ~0x3);
- pci_write_config8(GMCH_IGD, 0x62, pci_read_config8(GMCH_IGD, 0x62) | 2);
+ pci_and_config8(GMCH_IGD, 0x62, ~0x3);
+ pci_or_config8(GMCH_IGD, 0x62, 2);
if (config->use_crt) {
/* Enable VGA */