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authorAngel Pons <th3fanbus@gmail.com>2020-03-09 21:39:44 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 13:09:19 +0000
commit39ff703aa989ebdc056dd27e181fd135a551f522 (patch)
tree61c38b71557a22d5b553f17849c12ffc802cec8e /src/northbridge/intel/pineview/acpi.c
parent099975debd89e72a1f2ea3a62dc1b9685b95533f (diff)
nb/intel/pineview: Clean up code and comments
- Reformat some lines of code - Put names to all MCHBAR registers in a separate file - Rewrite several comments - Use C-style comments for consistency - Rewrite some hex constants - Use HOST_BRIDGE instead of PCI_DEV(0, 0, 0) - Align a bunch of things Tested with BUILD_TIMELESS=1, foxconn/d41s remains unaffected. Change-Id: I29104b0c24d66c6f49844f99d62ec433bb31bdaf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/pineview/acpi.c')
-rw-r--r--src/northbridge/intel/pineview/acpi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c
index 2e12305e0b..c3e50ee86a 100644
--- a/src/northbridge/intel/pineview/acpi.c
+++ b/src/northbridge/intel/pineview/acpi.c
@@ -31,8 +31,8 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
max_buses = length >> 20;
- current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
- pciexbar, 0x0, 0x0, max_buses - 1);
+ current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current, pciexbar, 0, 0,
+ max_buses - 1);
return current;
}