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authorArthur Heymans <arthur@aheymans.xyz>2018-04-10 13:40:39 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-12-03 10:19:32 +0000
commitde6bda63d9890ac88a01368314fcf0802a694cf4 (patch)
treeca2ff0703fbbff504837b6f6c16ab661f706baf2 /src/northbridge/intel/pineview/Kconfig
parent4c65bfc3e88fe6f4d6441fb7e51f78ed22dea709 (diff)
nb/intel/pineview: Use common code for SMM in TSEG
This also caches the TSEG region and therefore increases MTRR usage a little in some cases. Change-Id: I5f947cfae730b67bc76a581bc90cb10e5a2a4a52 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/25598 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/pineview/Kconfig')
-rw-r--r--src/northbridge/intel/pineview/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 9b72ebf117..6168305f7a 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -30,6 +30,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
+ select SMM_TSEG
config BOOTBLOCK_NORTHBRIDGE_INIT
string