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authorNico Huber <nico.huber@secunet.com>2017-05-22 13:49:22 +0200
committerNico Huber <nico.h@gmx.de>2017-06-08 14:58:15 +0200
commitd4ebeaf475dc1137f489f12ffa4e55d914238662 (patch)
tree413472484c5fbb9ac2f2a003b592c37bbc0ce826 /src/northbridge/intel/nehalem
parent26ce9af9a04ae282ff7c186eac0476f13a37cfa0 (diff)
device/Kconfig: Put gfx init methods into a `choice`
Provide all gfx init methods as a Kconfig `choice`. This elimates the option to select native gfx init along with running a Video BIOS. It's been only theoretically useful in one corner case: Hybrid graphics where only one controller is supported by native gfx init. Though I suppose in that case it's fair to assume that one would use SeaBIOS to run the VBIOS. For the case that we want the payload to initialize graphics or no pre-boot graphics at all, the new symbol NO_GFX_INIT was added to the choice. If multiple options are available, the default is chosen as follows: * NO_GFX_INIT, if we add a Video BIOS and the payload is SeaBIOS, * VGA_ROM_RUN, if we add a Video BIOS and the payload is not SeaBIOS, * NATIVE_VGA_INIT, if we don't add a Video BIOS. As a side effect, libgfxinit is now an independent choice. Change-Id: I06bc65ecf3724f299f59888a97219fdbd3d2d08b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/nehalem')
-rw-r--r--src/northbridge/intel/nehalem/gma.c62
1 files changed, 32 insertions, 30 deletions
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 0af8d6c63a..43ca4b661a 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -1008,38 +1008,40 @@ static void gma_func0_init(struct device *dev)
/* Init graphics power management */
gma_pm_init_pre_vbios(dev);
-#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
- /* PCI Init, will run VBIOS */
- pci_dev_init(dev);
-#else
- u32 physbase;
- struct northbridge_intel_nehalem_config *conf = dev->chip_info;
- struct resource *lfb_res;
- struct resource *pio_res;
-
- lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2);
- pio_res = find_resource(dev, PCI_BASE_ADDRESS_4);
-
- physbase = pci_read_config32(dev, 0x5c) & ~0xf;
-
- if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base
- && lfb_res && lfb_res->base) {
- printk(BIOS_SPEW, "Initializing VGA without OPROM. MMIO 0x%llx\n",
- gtt_res->base);
- if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
- int lightup_ok;
- gma_gfxinit(gtt_res->base, lfb_res->base,
- physbase, &lightup_ok);
- } else {
- intel_gma_init(conf, res2mmio(gtt_res, 0, 0), physbase,
- pio_res->base, lfb_res->base);
+ if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) ||
+ IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
+ u32 physbase;
+ struct northbridge_intel_nehalem_config *conf = dev->chip_info;
+ struct resource *lfb_res;
+ struct resource *pio_res;
+
+ lfb_res = find_resource(dev, PCI_BASE_ADDRESS_2);
+ pio_res = find_resource(dev, PCI_BASE_ADDRESS_4);
+
+ physbase = pci_read_config32(dev, 0x5c) & ~0xf;
+
+ if (gtt_res && gtt_res->base && physbase &&
+ pio_res && pio_res->base && lfb_res && lfb_res->base) {
+ printk(BIOS_SPEW,
+ "Initializing VGA without OPROM. MMIO 0x%llx\n",
+ gtt_res->base);
+ if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
+ int lightup_ok;
+ gma_gfxinit(gtt_res->base, lfb_res->base,
+ physbase, &lightup_ok);
+ } else {
+ intel_gma_init(conf, res2mmio(gtt_res, 0, 0),
+ physbase, pio_res->base, lfb_res->base);
+ }
}
- }
-
- /* Linux relies on VBT for panel info. */
- generate_fake_intel_oprom(&conf->gfx, dev, "$VBT IRONLAKE-MOBILE");
-#endif
+ /* Linux relies on VBT for panel info. */
+ generate_fake_intel_oprom(&conf->gfx, dev,
+ "$VBT IRONLAKE-MOBILE");
+ } else {
+ /* PCI Init, will run VBIOS */
+ pci_dev_init(dev);
+ }
/* Post VBIOS init */
gma_pm_init_post_vbios(dev);