diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2017-11-25 00:45:23 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-12-20 13:17:07 +0000 |
| commit | 6b6c94bacc13a374abc8069aec7da074121015b9 (patch) | |
| tree | b200eddf5e15db621d06260416e92edc2b7b5a48 /src/northbridge/intel/nehalem | |
| parent | f67c967af2e778ca5a16a9b62ec56c0fdc9b1597 (diff) | |
intel/gma: fix RPNFREQ_VAL bitmask
gma.c of Nehalem was copied from Sandy/Ivy Bridge, so fix it there too.
Tested on lenovo/x230. Since both the bit that was masked wrongly and the
one that wasn't masked, but sould have been, are 0, the behaviour on
lenovo/x230 doesn't change.
Change-Id: I5f51c4929df83f948fcb7dc06e07ac3cc4ccf4f2
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/22596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/nehalem')
| -rw-r--r-- | src/northbridge/intel/nehalem/gma.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 0c681ccc83..4dcbfb30ee 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -488,10 +488,11 @@ static void gma_pm_init_pre_vbios(struct device *dev) } /* 12: Normal Frequency Request */ - /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 (8 bits!? use 7) */ + /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */ + /* only the lower 7 bits are used and shifted left by 25 */ reg32 = MCHBAR32(0x5998); reg32 >>= 16; - reg32 &= 0xef; + reg32 &= 0x7f; reg32 <<= 25; gtt_write(0xa008, reg32); |