nb/intel/ironlake: Move register headers into a subfolder

Move all files with register definitions into a `registers` subfolder.
Subsequent commits will move the remaining registers into this folder.

Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.

Change-Id: I872269ca3c7fbbcffe83327a20bcf8d98b356beb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 31 insertions, 0 deletions

diff --git a/src/northbridge/intel/ironlake/registers/host_bridge.h b/src/northbridge/intel/ironlake/registers/host_bridge.h
new file mode 100644
index 0000000000..0322a515cc
--- /dev/null
+++ b/src/northbridge/intel/ironlake/registers/host_bridge.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __IRONLAKE_REGISTERS_HOST_BRIDGE_H__
+#define __IRONLAKE_REGISTERS_HOST_BRIDGE_H__
+
+#define EPBAR		0x40
+#define MCHBAR		0x48
+#define GGC		0x52
+#define DEVEN		0x54
+#define  DEVEN_IGD	(1 << 3)
+#define  DEVEN_PEG10	(1 << 1)
+#define  DEVEN_HOST	(1 << 0)
+
+#define DMIBAR		0x68
+
+#define LAC		0x87 /* Legacy Access Control */
+
+#define REMAPBASE	0x98
+#define REMAPLIMIT	0x9a
+#define TOM		0xa0
+#define TOUUD		0xa2
+#define IGD_BASE	0xa4
+#define GTT_BASE	0xa8
+#define TSEG		0xac /* TSEG base */
+#define TOLUD		0xb0
+
+#define SKPD		0xdc /* Scratchpad Data */
+
+#define CAPID0		0xe0
+
+#endif /* __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ */