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authorMatt Delco <delco@chromium.org>2018-08-13 13:42:05 -0700
committerDuncan Laurie <dlaurie@chromium.org>2018-08-17 20:13:21 +0000
commit4988fe2986078a8d8f87f5683ee3c820655895ca (patch)
treee6c337d1a2a6827adbfec666e161ba7d8e0f5bfe /src/northbridge/intel/i945
parentb425bc8cd062ac2a8c01e6ce79b88d1ba9729f7d (diff)
src/include: add more msr defines
This change adds some MSRs that are needed in a subsequent change to add support for Continuous Performance Control. Change-Id: Id4ecff1bc5eedaa90b41de526b9a2e61992ac296 Signed-off-by: Matt Delco <delco@chromium.org> Reviewed-on: https://review.coreboot.org/28067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/northbridge/intel/i945')
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