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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-28 21:05:26 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 18:28:48 +0200
commit15279a9696c70b82c2223264a505da9122f9aa7b (patch)
tree7038d85ab02e392f86a618c49f3db31e14d250f0 /src/northbridge/intel/i945
parent585d1a0e7d0025e459a35b470572bcdbfff4e3c8 (diff)
src/northbridge: Capitalize CPU, RAM and ROM
Change-Id: I5aa27f06f82a8309afb6e06c9e462e5792aa9986 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15940 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r--src/northbridge/intel/i945/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 59a31deacf..5469059070 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -85,7 +85,7 @@ static __attribute__((noinline)) void do_ram_command(u32 command)
static void ram_read32(u32 offset)
{
- PRINTK_DEBUG(" ram read: %08x\n", offset);
+ PRINTK_DEBUG(" RAM read: %08x\n", offset);
read32((void *)offset);
}
@@ -1453,7 +1453,7 @@ static struct dimm_size sdram_get_dimm_size(struct sys_info *sysinfo, u16 dimmno
val_err:
die("Bad SPD value\n");
hw_err:
- /* If a hardware error occurs the spd rom probably does not exist.
+ /* If a hardware error occurs the spd ROM probably does not exist.
* In this case report that there is no memory
*/
sz.side1 = 0;