diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-09 11:30:23 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-22 17:55:37 +0100 |
| commit | 70a8e34853d4b01ab7a2089821c35715c59b4415 (patch) | |
| tree | b39e19d126491bdf23a2026cc58374b019d169cb /src/northbridge/intel/i945/udelay.c | |
| parent | 219daafa8fc27483b2a652d9428d874bf960a6a1 (diff) | |
nb/intel/i945: Fix errors found by checkpatch.pl
Change-Id: Ic2dd40e73d4a4c091c5ce1f49bbf9ab4d013d7af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18704
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i945/udelay.c')
| -rw-r--r-- | src/northbridge/intel/i945/udelay.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/udelay.c b/src/northbridge/intel/i945/udelay.c index 27e616b56d..90f2638251 100644 --- a/src/northbridge/intel/i945/udelay.c +++ b/src/northbridge/intel/i945/udelay.c @@ -65,9 +65,8 @@ void udelay(u32 us) tsc1 = rdtsc(); dword = tsc1.lo + tscd.lo; - if ((dword < tsc1.lo) || (dword < tscd.lo)) { + if ((dword < tsc1.lo) || (dword < tscd.lo)) tsc1.hi++; - } tsc1.lo = dword; tsc1.hi += tscd.hi; |