diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-02-22 06:09:43 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-02-22 06:09:43 +0000 |
commit | de3206a7bebce99f11e753164cc4d46357bba96a (patch) | |
tree | 9843d883940e372dd357b1357ecd7eaba3e3365f /src/northbridge/intel/i945/raminit.c | |
parent | d650e9934ff8da9b9cb69e42e642c0ee6d390bf6 (diff) |
This is a general cleanup patch
- drop include/part and move files to include/
- get rid lots of warnings
- make resource allocator happy with w83627thg
- trivial cbmem resume fix
- fix payload and log level settings in abuild
- fix kontron mptable for virtual wire mode
- drop some dead includes and dead code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/raminit.c')
-rw-r--r-- | src/northbridge/intel/i945/raminit.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 124ef147c3..be63e7adcc 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -398,12 +398,8 @@ static void sdram_get_dram_configuration(struct sys_info *sysinfo) die("No memory installed.\n"); } - /* The chipset might be able to do this. What the heck, legacy bios - * just beeps when a single DIMM is in the Channel 1 socket. So let's - * not bother until someone needs this enough to cope with it. - */ if (!(dimm_mask & ((1 << DIMM_SOCKETS) - 1))) { - printk_err("Channel 0 has no memory populated. This setup is not usable. Please move the DIMM.\n"); + printk_info("Channel 0 has no memory populated.\n"); } } @@ -454,7 +450,7 @@ static void sdram_detect_cas_latency_and_ram_speed(struct sys_info * sysinfo, u8 { int i, j, idx; int lowest_common_cas = 0; - int max_ram_speed; + int max_ram_speed = 0; const u8 ddr2_speeds_table[] = { 0x50, 0x60, /* DDR2 400: tCLK = 5.0ns tAC = 0.6ns */ @@ -1593,7 +1589,7 @@ static void sdram_set_bank_architecture(struct sys_info *sysinfo) if (sysinfo->banks[i] != 8) continue; - printk_spew("DIMM%d has 8 banks.\n"); + printk_spew("DIMM%d has 8 banks.\n", i); if (i & 1) MCHBAR16(off32) |= 0x50; @@ -2572,7 +2568,7 @@ static void sdram_power_management(struct sys_info *sysinfo) reg8 |= (1 << 2); pci_write_config8(PCI_DEV(0, 0x2, 0), 0xc1, reg8); -#if C2_SELF_REFRESH_DISABLE +#ifdef C2_SELF_REFRESH_DISABLE if (integrated_graphics) { printk_debug("C2 self-refresh with IGD\n"); |