diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-03-11 16:20:39 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-03-11 16:20:39 +0000 |
| commit | 30140a59f7c34b583b670401a205338e0c8e3311 (patch) | |
| tree | 07b6d6f8c10c804ae3d0e0e9b6eb6f73511a29d7 /src/northbridge/intel/i945/raminit.c | |
| parent | d229677b6191868661676658d84d7325d8f69f23 (diff) | |
i945 northbridge update
- lots of PCIe updates
- various bug fixes to early init
- some fixes for typos and warnings
- initial support for PCIe x16
- some minor fixes to memory init code
- some subsystem vendor id patches, to be consistent with ICH7
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i945/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i945/raminit.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 8220e9bbd3..25ba6c25bf 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -2160,8 +2160,10 @@ static void sdram_post_jedec_initialization(struct sys_info *sysinfo) reg32 = MCHBAR32(DCC); #if CHANNEL_XOR_RANDOMIZATION reg32 &= ~(1 << 10); -#endif + reg32 |= (1 << 9); +#else reg32 &= ~(1 << 9); +#endif MCHBAR32(DCC) = reg32; } @@ -2242,7 +2244,12 @@ static void sdram_power_management(struct sys_info *sysinfo) } MCHBAR16(CPCTL) = reg16; +#if 0 + /* This is set later in the game */ if ((MCHBAR32(ECO) & (1 << 16)) != 0) { +#else + if (i945_silicon_revision() != 0) { +#endif switch (sysinfo->fsb_frequency) { case 667: MCHBAR32(HGIPMC2) = 0x0d590d59; break; case 533: MCHBAR32(HGIPMC2) = 0x155b155b; break; @@ -2306,7 +2313,7 @@ static void sdram_power_management(struct sys_info *sysinfo) /* stepping 0 and 1 */ MCHBAR32(FSBPMC4) &= ~(1 << 4); } else { - MCHBAR32(FSBPMC4) &= ~(1 << 4); + MCHBAR32(FSBPMC4) |= (1 << 4); } reg8 = pci_read_config8(PCI_DEV(0,0x0,0), 0xfc); |