diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-09 11:30:23 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-22 17:55:37 +0100 |
| commit | 70a8e34853d4b01ab7a2089821c35715c59b4415 (patch) | |
| tree | b39e19d126491bdf23a2026cc58374b019d169cb /src/northbridge/intel/i945/i945.h | |
| parent | 219daafa8fc27483b2a652d9428d874bf960a6a1 (diff) | |
nb/intel/i945: Fix errors found by checkpatch.pl
Change-Id: Ic2dd40e73d4a4c091c5ce1f49bbf9ab4d013d7af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18704
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 1686acc0f9..330ace1bed 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -61,7 +61,7 @@ #define DEVEN_D2F1 (1 << 4) #ifndef BOARD_DEVEN -#define BOARD_DEVEN ( DEVEN_D0F0 | DEVEN_D2F0 | DEVEN_D2F1 ) +#define BOARD_DEVEN (DEVEN_D0F0 | DEVEN_D2F0 | DEVEN_D2F1) #endif /* BOARD_DEVEN */ #define PAM0 0x90 @@ -99,9 +99,9 @@ * MCHBAR */ -#define MCHBAR8(x) *((volatile u8 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR16(x) *((volatile u16 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) +#define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) /* Chipset Control Registers */ #define FSBPMC3 0x40 /* 32bit */ @@ -283,9 +283,9 @@ * EPBAR - Egress Port Root Complex Register Block */ -#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x)) -#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x)) -#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x)) +#define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) #define EPPVCCAP1 0x004 /* 32bit */ #define EPPVCCAP2 0x008 /* 32bit */ @@ -314,9 +314,9 @@ * DMIBAR */ -#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x)) +#define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) #define DMIVCECH 0x000 /* 32bit */ #define DMIPVCCAP1 0x004 /* 32bit */ @@ -359,10 +359,10 @@ void setup_ich7_gpios(void); /* debugging functions */ void print_pci_devices(void); -void dump_pci_device(unsigned dev); +void dump_pci_device(unsigned int dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); +void dump_mem(unsigned int start, unsigned int end); u32 decode_igd_memory_size(u32 gms); |