diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-20 12:32:22 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-10 07:30:05 +0000 |
| commit | 4299cb48294af6940a6823696d346fd5ee1bac4e (patch) | |
| tree | 25d24b083daacdb74ea754c16531d69b61a925bd /src/northbridge/intel/i945/i945.h | |
| parent | e88f705946a1f8b18ff421c654a568581b1e969e (diff) | |
nb/intel/i945: Use common {DMI,EP,MCH}BAR accessors
Tested with BUILD_TIMELESS=1, Getac P470 remains identical.
Change-Id: If6d6cba76bdd1134372ab2faa475e574fdc5fddf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index b3c28aebd1..fe06afc8ec 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -3,7 +3,7 @@ #ifndef NORTHBRIDGE_INTEL_I945_H #define NORTHBRIDGE_INTEL_I945_H -#include "memmap.h" +#define DEFAULT_X60BAR 0xfed13000 #include <southbridge/intel/i82801gx/i82801gx.h> @@ -90,9 +90,7 @@ * MCHBAR */ -#define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) -#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) -#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) +#include <northbridge/intel/common/fixed_bars.h> /* Chipset Control Registers */ #define FSBPMC3 0x40 /* 32bit */ @@ -274,10 +272,6 @@ * EPBAR - Egress Port Root Complex Register Block */ -#define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) -#define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) -#define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) - #define EPPVCCAP1 0x004 /* 32bit */ #define EPPVCCAP2 0x008 /* 32bit */ @@ -305,10 +299,6 @@ * DMIBAR */ -#define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) -#define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) -#define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) - #define DMIVCECH 0x000 /* 32bit */ #define DMIPVCCAP1 0x004 /* 32bit */ #define DMIPVCCAP2 0x008 /* 32bit */ |