diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-01-28 13:56:18 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-05 09:39:08 +0000 |
commit | 6e732d34a0c1b87803925065b66076599c1e5642 (patch) | |
tree | 2e3d33bc34b934edab5ebd0a5af9146b9ec8f482 /src/northbridge/intel/i945/early_init.c | |
parent | 6e0ca68c82fe2285e7f6c8fc22711d4a4c65aa2a (diff) |
intel: Turn `DEFAULT_RCBA` into a Kconfig symbol
Create `FIXED_RCBA_MMIO_BASE` and use it everywhere, except in cases
where a pointer cast would be necessary. Instances in Sandy Bridge MRC
code were left as-is intentionally, so as not to collide with another
cleanup patch train.
Tested with BUILD_TIMELESS=1, these boards remain identical:
- Asus P8Z77-V LX2
- Packard Bell MS2290
Change-Id: I642958fbd6f02dbf54812d6a75d6bc3087acc77a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50036
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945/early_init.c')
-rw-r--r-- | src/northbridge/intel/i945/early_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index dea4f9b72b..4564ff4bbb 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -730,7 +730,7 @@ static void i945_setup_root_complex_topology(void) reg32 |= (1 << 0); DMIBAR32(DMILE1D) = reg32; - DMIBAR32(DMILE1A) = (uintptr_t)DEFAULT_RCBA; + DMIBAR32(DMILE1A) = CONFIG_FIXED_RCBA_MMIO_BASE; DMIBAR32(DMILE2D) |= (1 << 16) | (1 << 0); |