diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-09 11:30:23 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-22 17:55:37 +0100 |
| commit | 70a8e34853d4b01ab7a2089821c35715c59b4415 (patch) | |
| tree | b39e19d126491bdf23a2026cc58374b019d169cb /src/northbridge/intel/i945/bootblock.c | |
| parent | 219daafa8fc27483b2a652d9428d874bf960a6a1 (diff) | |
nb/intel/i945: Fix errors found by checkpatch.pl
Change-Id: Ic2dd40e73d4a4c091c5ce1f49bbf9ab4d013d7af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18704
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i945/bootblock.c')
| -rw-r--r-- | src/northbridge/intel/i945/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c index d837122e6b..4c3c90c49b 100644 --- a/src/northbridge/intel/i945/bootblock.c +++ b/src/northbridge/intel/i945/bootblock.c @@ -20,5 +20,5 @@ static void bootblock_northbridge_init(void) * 4GiB. */ reg = CONFIG_MMCONF_BASE_ADDRESS | 4 | 1; /* 64MiB - 0-63 buses. */ - pci_io_write_config32(PCI_DEV(0,0,0), PCIEXBAR, reg); + pci_io_write_config32(PCI_DEV(0, 0, 0), PCIEXBAR, reg); } |