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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-01 11:21:53 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-04 00:53:39 +0200 |
| commit | 032c23db08e6f0c6a2937092edafa26339aa4921 (patch) | |
| tree | a2b840787cb06d3896524e19ffbeef709abfd965 /src/northbridge/intel/i945/Kconfig | |
| parent | fbdb085549b6c500e12dc2fb21143a197b4be042 (diff) | |
intel/i945: Use MMCONF_SUPPORT_DEFAULT
Change all PCI configuration accesses to MMIO on all boards
with i945 chipset. To enable MMIO style access, add explicit
PCI IO config write in the bootblock.
Change-Id: Ia1ab73f1a2dcda87db4eb9b2ffddc6f7b4382b01
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3584
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Nico Huber <nico.huber@secunet.com>
Diffstat (limited to 'src/northbridge/intel/i945/Kconfig')
| -rw-r--r-- | src/northbridge/intel/i945/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index fbc9988f02..135cbe3cf8 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -24,6 +24,8 @@ if NORTHBRIDGE_INTEL_I945 config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy def_bool y + select MMCONF_SUPPORT + select MMCONF_SUPPORT_DEFAULT select HAVE_DEBUG_RAM_SETUP select LAPIC_MONOTONIC_TIMER @@ -32,6 +34,10 @@ config NORTHBRIDGE_INTEL_SUBTYPE_I945GC config NORTHBRIDGE_INTEL_SUBTYPE_I945GM def_bool n +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/intel/i945/bootblock.c" + config VGA_BIOS_ID string default "8086,27a2" |