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authorEric Biederman <ebiederm@xmission.com>2004-11-18 22:38:08 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-18 22:38:08 +0000
commita9e632c2ac29c60872e7e4f9314263b34ce5031d (patch)
tree2a76647833896d68306553c548a65743c87b417e /src/northbridge/intel/i855pm
parentbec8acedf18b4d35f95b4a4c254eb925bd4d53bd (diff)
- First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now. - Added support for having different versions of the pci access functions on a per bus basis if needed. Hopefully I have not broken something inadvertently. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i855pm')
-rw-r--r--src/northbridge/intel/i855pm/northbridge.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index c311a05edc..e612cf1efc 100644
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -149,7 +149,7 @@ static void enable_dev(struct device *dev)
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
- pci_set_method();
+ pci_set_method(dev);
}
else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
dev->ops = &cpu_bus_ops;