diff options
| author | Joseph Smith <joe@settoplinux.org> | 2010-03-17 03:18:29 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-17 03:18:29 +0000 |
| commit | 0d7a99669545bef76d57d17fd41ab376e061b109 (patch) | |
| tree | f0f27f51661d5ead8970d5a65ee7a603549736a6 /src/northbridge/intel/i82830/raminit.c | |
| parent | bd112980ffcc7d9809dff88b7208e804c54345ab (diff) | |
This is kind of a pre CAR patch to properly allocate "shared" graphics memory
area.
CONFIG_GFXUMA is used in src/cpu/x86/mtrr/mtrr.c which is called by the cpu.
Attached is a revised patch which works well.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
See boot snips below:
Root Device assign_resources, bus 0 link: 0
8MB IGD UMA
Available memory: 581632KB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
----------------------------
Adding high table area
Adding UMA memory area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 0000000000100000-00000000237effff: RAM
3. 00000000237f0000-00000000237fffff: CONFIGURATION TABLES
4. 0000000023800000-0000000023ffffff: RESERVED
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i82830/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i82830/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i82830/raminit.c b/src/northbridge/intel/i82830/raminit.c index 9e2f3c4bf1..2eea5f0e19 100644 --- a/src/northbridge/intel/i82830/raminit.c +++ b/src/northbridge/intel/i82830/raminit.c @@ -48,7 +48,7 @@ Macros and definitions. * 0x0 for Refresh Disabled (Self Refresh) * 0x1 for Refresh interval 15.6 us for 133MHz * 0x2 for Refresh interval 7.8 us for 133MHz - * 0x7 /* Refresh interval 128 Clocks. (Fast Refresh Mode) + * 0x7 for Refresh interval 128 Clocks. (Fast Refresh Mode) */ #define RAM_COMMAND_REFRESH 0x1 |