aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/i5000/Makefile.inc
diff options
context:
space:
mode:
authorMartin Roth <gaumless@gmail.com>2017-10-15 14:58:49 -0600
committerMartin Roth <martinroth@google.com>2018-01-15 23:24:53 +0000
commitf6af8943e23b8ffa27df6ddb8e4a654387be0cb6 (patch)
treed5b2cab4d1ba2b8de91fd1abedf07033a429b19a /src/northbridge/intel/i5000/Makefile.inc
parent779b32beffae83ece727a43f2ce216513bf66c15 (diff)
Intel i5000 board & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i5000 Mainboards: mainboard/supermicro/x7db8 mainboard/asus/dsbf Change-Id: I6614c0033b4439d196f26819998d3f85e6d11c00 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/22030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel/i5000/Makefile.inc')
-rw-r--r--src/northbridge/intel/i5000/Makefile.inc22
1 files changed, 0 insertions, 22 deletions
diff --git a/src/northbridge/intel/i5000/Makefile.inc b/src/northbridge/intel/i5000/Makefile.inc
deleted file mode 100644
index 9f6c38e15f..0000000000
--- a/src/northbridge/intel/i5000/Makefile.inc
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2007-2009 coresystems GmbH
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I5000),y)
-
-ramstage-y += northbridge.c
-romstage-y += raminit.c
-cpu_incs-y += src/northbridge/intel/i5000/halt_second_bsp.S
-
-endif