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authorMartin Roth <martin@coreboot.org>2019-10-23 21:44:42 -0600
committerMartin Roth <martinroth@google.com>2019-10-27 18:12:50 +0000
commit468d02cc82151366a2781c9af29e6737105495cb (patch)
treede8540c053517a4da8b00ea95f24579bd9223dcd /src/northbridge/intel/i440bx
parent36fcc85be459ec175c7f4be08db7ae9708f01b5d (diff)
src/[northbridge,security]: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If6b5930f78c3da6dcefaa7b6202cd0424a24525b Reviewed-on: https://review.coreboot.org/c/coreboot/+/36331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/i440bx')
-rw-r--r--src/northbridge/intel/i440bx/debug.c4
-rw-r--r--src/northbridge/intel/i440bx/raminit.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index 9518618825..7df639b6bd 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -21,7 +21,7 @@ void dump_spd_registers(void)
int i;
printk(BIOS_DEBUG, "\n");
for (i = 0; i < DIMM_SOCKETS; i++) {
- unsigned device;
+ unsigned int device;
device = DIMM0 + i;
if (device) {
int j;
@@ -45,7 +45,7 @@ void dump_spd_registers(void)
}
}
-void dump_pci_device(unsigned dev)
+void dump_pci_device(unsigned int dev)
{
int i;
printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x\n", (dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 7);
diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h
index 4711359181..448f8d69be 100644
--- a/src/northbridge/intel/i440bx/raminit.h
+++ b/src/northbridge/intel/i440bx/raminit.h
@@ -31,7 +31,7 @@ void sdram_initialize(void);
/* Debug */
#if CONFIG(DEBUG_RAM_SETUP)
void dump_spd_registers(void);
-void dump_pci_device(unsigned dev);
+void dump_pci_device(unsigned int dev);
#else
#define dump_spd_registers()
#endif