diff options
| author | Keith Hui <buurin@gmail.com> | 2020-04-29 12:47:41 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-04 09:39:34 +0000 |
| commit | 0e0fdbef1cc7753b836321aa72f4bb71613d124e (patch) | |
| tree | c8d513aeb4334c2106acd26487baf095e7d3d379 /src/northbridge/intel/i440bx | |
| parent | 11bce2059bd79199003b2c3a4fbe1d7a89492e34 (diff) | |
nb/intel/i440bx: Ready raminit for S3 resume path
Change-Id: I77e95850af82a5684ba10841260db021f5de1e8b
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/i440bx')
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/romstage.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index 18997c52ea..d1e0f40ac1 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -1004,7 +1004,7 @@ static void sdram_enable(void) void __weak enable_spd(void) { } void __weak disable_spd(void) { } -void sdram_initialize(void) +void sdram_initialize(int s3resume) { timestamp_add_now(TS_BEFORE_INITRAM); enable_spd(); diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h index 534bc447a3..e9099de2e9 100644 --- a/src/northbridge/intel/i440bx/raminit.h +++ b/src/northbridge/intel/i440bx/raminit.h @@ -9,7 +9,7 @@ void enable_spd(void); void disable_spd(void); -void sdram_initialize(void); +void sdram_initialize(int s3resume); void mainboard_enable_serial(void); /* Debug */ diff --git a/src/northbridge/intel/i440bx/romstage.c b/src/northbridge/intel/i440bx/romstage.c index 69cfa7fb38..199cf5cf0c 100644 --- a/src/northbridge/intel/i440bx/romstage.c +++ b/src/northbridge/intel/i440bx/romstage.c @@ -10,6 +10,6 @@ void mainboard_romstage_entry(void) { i82371eb_early_init(); - sdram_initialize(); + sdram_initialize(0); cbmem_initialize_empty(); } |