diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/northbridge/intel/i440bx/raminit.c | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel/i440bx/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index bf88418203..91959c7cd8 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -31,7 +31,7 @@ */ /* Debugging macros. */ -#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) +#if CONFIG(DEBUG_RAM_SETUP) #define PRINT_DEBUG(x...) printk(BIOS_DEBUG, x) #define DUMPNORTH() dump_pci_device(NB) #else @@ -297,7 +297,7 @@ static const u8 register_values[] = { * 0 = 3 clocks of RAS# precharge * 1 = 2 clocks of RAS# precharge */ -#if IS_ENABLED(CONFIG_SDRAMPWR_4DIMM) +#if CONFIG(SDRAMPWR_4DIMM) SDRAMC + 0, 0x00, 0x10, /* The board has 4 DIMM slots. */ #else SDRAMC + 0, 0x00, 0x00, /* The board has 3 DIMM slots. */ @@ -460,7 +460,7 @@ static void set_dram_buffer_strength(void) } } - if (IS_ENABLED(CONFIG_SDRAMPWR_4DIMM)) { + if (CONFIG(SDRAMPWR_4DIMM)) { /* * For a 4 DIMM board, based on ASUS P2B-LS mainboard. * |