diff options
| author | Keith Hui <buurin@gmail.com> | 2017-07-20 21:00:56 -0400 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-22 22:50:08 +0000 |
| commit | 9aa45e6952ec42f8a3ccc2bfaa15a782ad81aeb6 (patch) | |
| tree | 8591f1bf5797312f9d5af1efdae80a86b0a2c0ae /src/northbridge/intel/i440bx/i440bx.h | |
| parent | 3f6421e1fa126b98688a2277f3034dec3b06c8d0 (diff) | |
northbridge/intel/i440bx: Move NB macro to i440bx.h
This move makes the NB macro more widely available,
in preparation for implementing get_top_of_ram().
Change-Id: Icd8e82cfdfdccb662b2139d0e5d1d5af72cbae7f
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/20675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i440bx/i440bx.h')
| -rw-r--r-- | src/northbridge/intel/i440bx/i440bx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h index 4724719cfd..6e93e83d1a 100644 --- a/src/northbridge/intel/i440bx/i440bx.h +++ b/src/northbridge/intel/i440bx/i440bx.h @@ -86,4 +86,6 @@ #define DRTC 0xe8 /* DRAM Read Thermal Throttling Control (0x000..000). */ #define BUFFC 0xf0 /* Buffer Control Register (0x0000). */ +#define NB PCI_DEV(0, 0, 0) + #endif /* NORTHBRIDGE_INTEL_I440BX_I440BX_H */ |