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authorStefan Reinauer <stepan@coresystems.de>2010-08-30 17:53:13 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-30 17:53:13 +0000
commit704b59662d8bf17cac387109a186cc6f702f27f9 (patch)
tree12de99d00ac98616d0d4df8b089603649a93b699 /src/northbridge/intel/i3100
parent849498d4471003ff959e0151828abfe9a7be4621 (diff)
We call this cache as ram everywhere, so let's call it the same in Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i3100')
-rw-r--r--src/northbridge/intel/i3100/raminit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index 78e7b72f1f..5afddb7d9e 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -1212,7 +1212,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
pci_write_config16(ctrl->f0, MCHSCRB, data16);
/* The memory is now setup, use it */
-#if CONFIG_USE_DCACHE_RAM == 0
+#if CONFIG_CACHE_AS_RAM == 0
cache_lbmem(MTRR_TYPE_WRBACK);
#endif
}