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authorStefan Reinauer <stepan@coresystems.de>2009-04-30 13:58:42 +0000
committerStefan Reinauer <stepan@openbios.org>2009-04-30 13:58:42 +0000
commitb5fb0c5c4eda2329d848aedcf4f7e8b6dc8012b2 (patch)
tree9a0897635ecbeab0dd64124cd165d3460174a359 /src/northbridge/intel/i3100/northbridge.c
parent6841ce653741b3dafe8e3482b4a93adbaee53552 (diff)
Add high tables support to all northbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i3100/northbridge.c')
-rw-r--r--src/northbridge/intel/i3100/northbridge.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index d36af7caae..928fe94c73 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -97,6 +97,10 @@ static u32 find_pci_tolm(struct bus *bus)
return tolm;
}
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -185,6 +189,12 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, 6, remapbasek,
(remaplimitk + 64*1024) - remapbasek);
}
+
+#if HAVE_HIGH_TABLES==1
+ /* Leave some space for ACPI, PIRQ and MP tables */
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
}
assign_resources(&dev->link[0]);
}