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authorMartin Roth <martinroth@google.com>2016-11-18 09:29:03 -0700
committerMartin Roth <martinroth@google.com>2016-11-21 23:43:54 +0100
commit128c104c4d3b91d3371b03840af460d776af819d (patch)
treebb0621ae2c90b512948ba9fee350cf42a49f4db3 /src/northbridge/intel/i3100/northbridge.c
parentc6ec8dd1cb2303f7f7a71f0f494a6fc30b93dff4 (diff)
nb/intel: Fix some spelling mistakes in comments and strings
Change-Id: I4a8297397d878e38516c8df19dd311c7ef19ec06 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/17478 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/i3100/northbridge.c')
-rw-r--r--src/northbridge/intel/i3100/northbridge.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index a48d8fe41d..8025ac3cbb 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -93,7 +93,7 @@ static void pci_domain_set_resources(device_t dev)
/* Find the offset of the remap window from tolm */
remapoffsetk = remapbasek - tolmk;
}
- /* Write the RAM configruation registers,
+ /* Write the RAM configuration registers,
* preserving the reserved bits.
*/
tolm_r = pci_read_config16(mc_dev, 0xc4);