Haswell/falco/peppy/slippy: continue to clean up FUI.

As a first step towards removing hardcodes from the FUI support,
change the haswell call to i915_lightup to panel_lightup, and pass the
intel_dp * as a parameter. Get rid of the scalar arguments and make
them part of intel_dp. Get rid of file-scope variables and use the
ones in the intel_dp struct. In falco, use functions that peppy
uses. Drop slippy support for FUI, it's a dead board; if this is ok
I'll remove the files next.

And, incidentally, fix the broken RGBX constant and change it to BGRX.

Change-Id: I46ef5a9ed8433382d042066ee3542af04cfc319a
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://chromium-review.googlesource.com/174932
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Ronald Minnich <rminnich@chromium.org>
Tested-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 1e1ed410b445c8e2b7411e163d9d6f61499dc3f6)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6833
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)

1 files changed, 18 insertions, 13 deletions

diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 8be25e785f..015eabed0e 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -426,21 +426,18 @@ static void gma_pm_init_post_vbios(struct device *dev)
 
 static void gma_func0_init(struct device *dev)
 {
+#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
+	struct northbridge_intel_haswell_config *conf = dev->chip_info;
+	struct intel_dp dp;
+#endif
+
 	int lightup_ok = 0;
 	u32 reg32;
-	u32 graphics_base; //, graphics_size;
 	/* IGD needs to be Bus Master */
 	reg32 = pci_read_config32(dev, PCI_COMMAND);
 	reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
 	pci_write_config32(dev, PCI_COMMAND, reg32);
 
-
-	/* the BAR for graphics space is a well known number for
-	 * sandy and ivy. And the resource code renumbers it.
-	 * So it's almost like having two hardcodes.
-	 */
-	graphics_base = dev->resource_list[1].base;
-
 	/* Init graphics power management */
 	gma_pm_init_pre_vbios(dev);
 
@@ -449,17 +446,25 @@ static void gma_func0_init(struct device *dev)
 
 #if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
 	printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
-	u32 mmiobase, physbase;
 	/* Default set to 1 since it might be required for
 	   stuff like seabios */
 	unsigned int init_fb = 1;
-	mmiobase = dev->resource_list[0].base;
-	physbase = pci_read_config32(dev, 0x5c) & ~0xf;
+
+	/* the BAR for graphics space is a well known number for
+	 * sandy and ivy. And the resource code renumbers it.
+	 * So it's almost like having two hardcodes.
+	 */
+	dp.graphics = (void *)((uintptr_t)dev->resource_list[1].base);
+	dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
+	dp.panel_power_down_delay = conf->gpu_panel_power_down_delay;
+	dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
+	dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
+
+	dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
 #ifdef CONFIG_CHROMEOS
 	init_fb = developer_mode_enabled() || recovery_mode_enabled();
 #endif
-	lightup_ok = i915lightup(physbase, mmiobase, graphics_base, init_fb);
-	if (lightup_ok)
+	lightup_ok = panel_lightup(&dp, init_fb);
 		gfx_set_init_done(1);
 #endif
 	if (! lightup_ok) {