diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-15 20:57:04 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-17 14:21:58 +0000 |
| commit | 361bb53aa2bb6314bf22690f5436af7c096d0e0a (patch) | |
| tree | d0e4682ef6d9c644a4ab80de4a2ceb1eb3b7503c /src/northbridge/intel/haswell | |
| parent | ddbc771524a2a127dd51f711b6d88b13884c2164 (diff) | |
soc/amd/picasso: introduce and use devicetree aliases for UART0-3
Since the default state of the MMIO UART devices in the chipset
devicetree is off, the mainboard devicetree entries that disable MMIO
UART devices are removed.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I913a587802020ce4e182b48632cdde1104c2a6e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55545
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell')
0 files changed, 0 insertions, 0 deletions