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| author | Elyes Haouas <ehaouas@noos.fr> | 2024-03-23 15:10:04 +0100 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2024-04-11 19:19:08 +0000 |
| commit | 31402178c56108e752b95c34562b6e3554a2c1d8 (patch) | |
| tree | 0ac4a3cea23ce5c66cc91f2883d3b30184d0f565 /src/northbridge/intel/haswell | |
| parent | 1dc8f0272bd222125d2d26cfa2b311f3d134f6ca (diff) | |
tree: Remove blank lines before '}' and after '{'
Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
| -rw-r--r-- | src/northbridge/intel/haswell/acpi.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index 8d179aaa62..f3c107b323 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -36,7 +36,6 @@ static unsigned long acpi_fill_dmar(unsigned long current) /* VTVC0BAR has to be set, enabled, and in 32-bit space */ if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) { - const unsigned long tmp = current; current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 48a0ba54c7..9e9f9804f5 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -124,7 +124,6 @@ u32 gtt_read(u32 reg) u32 val; val = read32(res2mmio(gtt_res, reg, 0)); return val; - } void gtt_write(u32 reg, u32 data) |