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authorArthur Heymans <arthur@aheymans.xyz>2017-05-25 19:55:52 +0200
committerMartin Roth <martinroth@google.com>2018-05-24 13:05:32 +0000
commit0d284959dcaf16416ce27b480339144fd6068bfe (patch)
tree5add4dd81fba292a6ef487ef2d1980e6b53c0e19 /src/northbridge/intel/haswell
parent3fa103a60261a3cd1925858a317dc1ffa89797f7 (diff)
nb/intel/x4x: Adapt post JEDEC for DDR3
Change-Id: I708f98dc2f36af73bb5933d186b4984649e149a1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/haswell')
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