diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-26 11:28:47 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-06 07:17:05 +0000 |
commit | 021c621eb0c8b21a34902519da595df94a973414 (patch) | |
tree | 8cf6e285c70308f775705002ca71229008e7d345 /src/northbridge/intel/haswell | |
parent | 8fee9951d30d03b4bca16c198b887c5415418c12 (diff) |
soc/amd/stoneyridge: Create chipset_power_state in romstage
Move chipset_power_state initialisation from early ramstage
to romstage cbmem hook, like everyone else does.
Change-Id: Ib9189a70996ac6cf4515a0d504eb687941a6b5e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
0 files changed, 0 insertions, 0 deletions