diff options
| author | Alexander Couzens <lynxis@fe80.eu> | 2016-03-09 05:11:44 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-11 18:55:51 +0100 |
| commit | 013accca7fb955dd04ee8a51d98e3d94a4941346 (patch) | |
| tree | 865c7b294bf5dae569ce4181117eddcc7085d9c2 /src/northbridge/intel/haswell/raminit.c | |
| parent | f0ab23cb031b4430fa5690ced901bfd741db5832 (diff) | |
spi/SST: fix write support for SST25VF064C
The SST25VF064C doesn't support the auto incrementing write which
all other supported SST chips support. Allow the chips to select
their write method.
Change-Id: Ic088d35461a625469ee6973d1267d7dd11963496
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/14000
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell/raminit.c')
0 files changed, 0 insertions, 0 deletions