diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-13 21:44:08 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 18:09:32 +0000 |
| commit | 6791ad221be29d079eeb484edd01089e19f16026 (patch) | |
| tree | c5d82b852b66aa0222c59e31fba9e82778e93d9a /src/northbridge/intel/haswell/raminit.c | |
| parent | 6fe7986daf7d7915f27b2e30aa120fce7d834c6e (diff) | |
nb/intel/haswell: Make MAD_DIMM_* registers indexed
This allows using the macro in a loop, for instance.
Change-Id: Ice43e5db9b4244946afb7f3e55e0c646ac1feffb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/haswell/raminit.c')
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index aaeaadf9ae..7fd6b3f83e 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -65,8 +65,8 @@ static void report_memory_config(void) int i; addr_decoder_common = MCHBAR32(MAD_CHNL); - addr_decode_chan[0] = MCHBAR32(MAD_DIMM_CH0); - addr_decode_chan[1] = MCHBAR32(MAD_DIMM_CH1); + addr_decode_chan[0] = MCHBAR32(MAD_DIMM(0)); + addr_decode_chan[1] = MCHBAR32(MAD_DIMM(1)); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); @@ -227,8 +227,8 @@ void setup_sdram_meminfo(struct pei_data *pei_data) memset(mem_info, 0, sizeof(struct memory_info)); - addr_decode_ch[0] = MCHBAR32(MAD_DIMM_CH0); - addr_decode_ch[1] = MCHBAR32(MAD_DIMM_CH1); + addr_decode_ch[0] = MCHBAR32(MAD_DIMM(0)); + addr_decode_ch[1] = MCHBAR32(MAD_DIMM(1)); ddr_frequency = (MCHBAR32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100; |