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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-03-12 01:08:14 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 12:53:33 +0000
commit3663d55a23fb64ea88dd1fd18ae4b0ce29e71a61 (patch)
treeb648eab1c23d9f884253cf748bfbf65af2fdb918 /src/northbridge/intel/haswell/northbridge.c
parent1f4f0b47f5f3a70658912eeca8172bc2f16b8351 (diff)
mb/intel/tglrvp: Enable CNVi in devicetree for Tiger Lake UP3
Enable CNVi in devicetree and add gpio pad configs for CNVi BUG=none BRANCH=none TEST=Build and boot tglrvp Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I71146960e0d53dae87946a0365dac6f224a72391 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39464 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell/northbridge.c')
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