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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-27 07:24:17 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-28 21:15:27 +0000
commitd7205bebd53761e17e22701ca0573ffa5629d38e (patch)
tree3620a0040d5ae10a4cbce854c9025fb1d50a7016 /src/northbridge/intel/haswell/haswell.h
parent197a3c6cea86cb92c10c05c710dd4184c0e7ba72 (diff)
nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use
Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/haswell/haswell.h')
-rw-r--r--src/northbridge/intel/haswell/haswell.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 55c0b4b24b..9de0cfb2c3 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -208,24 +208,20 @@
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
-#ifdef __SMM__
void intel_northbridge_haswell_finalize_smm(void);
-#else /* !__SMM__ */
+
void haswell_early_initialization(int chipset_type);
void haswell_late_initialization(void);
void set_translation_table(int start, int end, u64 base, int inc);
void haswell_unhide_peg(void);
void report_platform_info(void);
-#endif /* !__SMM__ */
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(struct device *device,
unsigned long start, struct acpi_rsdp *rsdp);
-#endif
#endif
#endif