diff options
author | Tristan Corrick <tristan@corrick.kiwi> | 2018-12-17 22:10:07 +1300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-29 07:14:47 +0000 |
commit | c5d367b4d3adbe50a91029710bce69c64b5fa3df (patch) | |
tree | 144fb4372739f1dbeb110d3b074d1f10fcf54b89 /src/northbridge/intel/haswell/haswell.h | |
parent | cf65627ffa51d2f88569adff83fd36fdd5cf0858 (diff) |
nb/intel/haswell: Handle boards that do not support IGD
Processor graphics is disabled on, for example, the C222 and C224
chipsets.
The change to resource assignment in northbridge.c prevents the following
warning that occurs when the IGD is disabled:
> skipping PCI: 00:00.0@3 fixed resource, size=0!
Tested on a Supermicro X10SLM+-F, which has the IGD disabled by the
chipset. The graphics memory is reclaimed and no issues were observed.
Also tested on an ASRock H81M-HDS. This board has an IGD, but no
regressions were observed.
Change-Id: I86d4aef50b6588f08b86c9758a4b95ccd65e9a96
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell/haswell.h')
-rw-r--r-- | src/northbridge/intel/haswell/haswell.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 33818ee4aa..bc2fc60e40 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -54,6 +54,11 @@ #define DMIBAR 0x68 #define GGC 0x50 /* GMCH Graphics Control */ +#define GGC_DISABLE_VGA_IO_DECODE (1 << 1) +#define GGC_IGD_MEM_IN_32MB_UNITS(x) (((x) & 0x1f) << 3) +#define GGC_GTT_0MB (0 << 8) +#define GGC_GTT_1MB (1 << 8) +#define GGC_GTT_2MB (2 << 8) #define DEVEN 0x54 /* Device Enable */ #define DEVEN_D7EN (1 << 14) |