aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/haswell/haswell.h
diff options
context:
space:
mode:
authorAlexander Couzens <lynxis@fe80.eu>2016-03-09 14:36:46 +0100
committerMartin Roth <martinroth@google.com>2016-03-11 19:00:14 +0100
commit92fc072c2faf3d1be82f50ee3feda42461e9ac16 (patch)
treedf2232c7db3a895bbf854fe87a73ac2f2dac13e6 /src/northbridge/intel/haswell/haswell.h
parent81c5c761b305dd62019759e5e39248b02c0af820 (diff)
northbridge/intel: move mrccache.c of sandybridge + haswell to common
The sourcecode is 99% the same. Only two lines differ, but not in functionality. Also rename mrccache.c -> mrc_cache.c Tested-on: boot + suspend/resume on x220 Change-Id: I36f79d066336f223b608c70c847ea6ea6e4ad287 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/14007 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/haswell/haswell.h')
-rw-r--r--src/northbridge/intel/haswell/haswell.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index c560428a06..6e587f8640 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -213,8 +213,6 @@ void dump_mem(unsigned start, unsigned end);
void report_platform_info(void);
#endif /* !__SMM__ */
-struct mrc_data_container;
-struct mrc_data_container *find_current_mrc_cache(void);
#if !defined(__PRE_RAM__)
#include "gma.h"
int init_igd_opregion(igd_opregion_t *igd_opregion);