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authorAaron Durbin <adurbin@chromium.org>2013-03-22 22:23:05 -0500
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-03-29 20:00:25 +0100
commitfcfe67c3b2b3391a8131eb26cc546a9afaa28822 (patch)
tree04c0910f9cfcf2821ff296aab31c428d11ab99a6 /src/northbridge/intel/haswell/gma.c
parent77a5b4046ab7e7bee887990b342a7356554fd391 (diff)
haswell: add option to mark graphics memory write-combining.
The graphics memory can be accessed in a faster manner by setting it to write-combing mode. Add an option to enable write-combining for the graphics memory. Change-Id: I797fcd9f0dfb074f9e45476773acbfe614eb4b0a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2893 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/haswell/gma.c')
-rw-r--r--src/northbridge/intel/haswell/gma.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index d0850667ac..0a67b6a851 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -217,12 +217,29 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+static void gma_read_resources(struct device *dev)
+{
+ pci_dev_read_resources(dev);
+
+#if CONFIG_MARK_GRAPHICS_MEM_WRCOMB
+ struct resource *res;
+
+ /* Set the graphics memory to write combining. */
+ res = find_resource(dev, PCI_BASE_ADDRESS_2);
+ if (res == NULL) {
+ printk(BIOS_DEBUG, "gma: memory resource not found.\n");
+ return;
+ }
+ res->flags |= IORESOURCE_WRCOMB;
+#endif
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
static struct device_operations gma_func0_ops = {
- .read_resources = pci_dev_read_resources,
+ .read_resources = gma_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,