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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 15:47:30 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:27:31 +0000 |
| commit | 90de10c17a2d72065592875b4af206e9cb1a7feb (patch) | |
| tree | 12a6bdbadef239cbb880737aaa51fee105b791e7 /src/northbridge/intel/haswell/acpi.c | |
| parent | 653d8717ba8d785af4e4eafca2416e1da2988f5d (diff) | |
nb/intel/pineview: Refactor `decode_pcie_bar`
Constify and eliminate local variables where possible to ease reading.
Tested with BUILD_TIMELESS, Foxconn D41S remains identical.
Change-Id: Iaad759886a8f5ac07aabdea8ab1c6d1aa7020dfc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/haswell/acpi.c')
0 files changed, 0 insertions, 0 deletions