diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2024-06-01 18:12:16 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-07-10 12:55:46 +0000 |
| commit | e7fa24470dc3b3403eabd757a87cfb993f316b1a (patch) | |
| tree | 6497bd70076905089fc81ed777cbec34486569c0 /src/northbridge/intel/gm45 | |
| parent | a9997f891facaf3c855d7f2c9c6840acbf101193 (diff) | |
cbmem_top: Change the return value to uintptr_t
Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45')
| -rw-r--r-- | src/northbridge/intel/gm45/memmap.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 8 |
2 files changed, 5 insertions, 7 deletions
diff --git a/src/northbridge/intel/gm45/memmap.c b/src/northbridge/intel/gm45/memmap.c index d03639919a..e2ba5542ea 100644 --- a/src/northbridge/intel/gm45/memmap.c +++ b/src/northbridge/intel/gm45/memmap.c @@ -117,12 +117,10 @@ void smm_region(uintptr_t *start, size_t *size) void fill_postcar_frame(struct postcar_frame *pcf) { - uintptr_t top_of_ram; - /* Cache 8 MiB region below the top of RAM and 2 MiB above top of * RAM to cover both cbmem as the TSEG region. */ - top_of_ram = (uintptr_t)cbmem_top(); + const uintptr_t top_of_ram = cbmem_top(); postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 8*MiB, MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(pcf, northbridge_get_tseg_base(), diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index dc187911c8..76ca4eea9d 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -81,7 +81,7 @@ static void mch_domain_read_resources(struct device *dev) reserved_ram_from_to(dev, idx++, 0xc0000, 1*MiB); /* Report < 4GB memory */ - ram_range(dev, idx++, 1*MiB, (uintptr_t)cbmem_top()); + ram_range(dev, idx++, 1*MiB, cbmem_top()); /* TSEG */ uintptr_t tseg_base; @@ -91,10 +91,10 @@ static void mch_domain_read_resources(struct device *dev) /* cbmem_top can be shifted downwards due to alignment. Mark the region between cbmem_top and tseg_base as unusable */ - if ((uintptr_t)cbmem_top() < tseg_base) { + if (cbmem_top() < tseg_base) { printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%lx\n", - tseg_base - (uintptr_t)cbmem_top()); - mmio_from_to(dev, idx++, (uintptr_t)cbmem_top(), tseg_base); + tseg_base - cbmem_top()); + mmio_from_to(dev, idx++, cbmem_top(), tseg_base); } /* graphic memory above TSEG */ |