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authorNico Huber <nico.huber@secunet.com>2015-12-29 23:35:37 +0100
committerMartin Roth <martinroth@google.com>2015-12-31 17:43:38 +0100
commit0a207399ce604c57326069b5202544d58ee4a120 (patch)
tree842ec9a1cc7337cdfb4272c0bbb3eab6915718ec /src/northbridge/intel/gm45
parent08debacad18a946892d8046af5d892c493d8c383 (diff)
lenovo/x200: Revise onboard IRQ routing
All southbridge interrupt pin and routing registers (D*IP and D*IR) are left at their default values (see ICH9 datasheet) and this file just has to reflect them. Change-Id: I687262556d918311757fda9afda9ebfdd7edf947 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/12813 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/intel/gm45')
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