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authorDuncan Laurie <dlaurie@chromium.org>2013-01-10 13:23:48 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-03-14 05:03:51 +0100
commitce36b12c2702d88e95e5c0294035bcd5e1de22ab (patch)
treef15b48df91b7b5e316e28a1031770426e15a1e6a /src/northbridge/intel/gm45
parent67113e95cf054e051c63e813814b91f909798ac9 (diff)
haswell: Add LPT LP device IDs to platform report
Boot haswell ULT and see LPT reported properly. Change-Id: I48344a8dde6adbbf331c91231342de45b1b6c32a Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2697 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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