diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-08-06 15:35:28 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-24 10:00:31 +0000 |
| commit | 17ad4598e9d3d302cc45c86a8e11aac62928c83c (patch) | |
| tree | c2f108634585b63c50822e5bdaa2ee57291d105e /src/northbridge/intel/gm45 | |
| parent | 794f56bdf5acc5d153472bb583d51bb9fe56166f (diff) | |
nb/intel/*: Account for cbmem_top alignment
Having cbmem floating between two ram regions is a bad idea and some
payloads (e.g. tianocore) even bail out on this. To overcome this issue mark the
region between tom and cbmem as uma.
Change-Id: Ifab37b0003f09a680024d5b155ab0bb157920952
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45')
| -rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index e14f843f9f..405eb5d324 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <console/console.h> #include <arch/io.h> #include <stdint.h> @@ -72,7 +73,7 @@ static int decode_pcie_bar(u32 *const base, u32 *const len) static void mch_domain_read_resources(struct device *dev) { u64 tom, touud; - u32 tomk, tolud, uma_sizek = 0; + u32 tomk, tolud, uma_sizek = 0, delta_cbmem; u32 pcie_config_base, pcie_config_size; /* Total Memory 2GB example: @@ -138,6 +139,15 @@ static void mch_domain_read_resources(struct device *dev) tomk -= tseg_sizek; uma_sizek += tseg_sizek; + /* cbmem_top can be shifted downwards due to alignment. + Mark the region between cbmem_top and tomk as unusable */ + delta_cbmem = tomk - ((uint32_t)cbmem_top() >> 10); + tomk -= delta_cbmem; + uma_sizek += delta_cbmem; + + printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", + delta_cbmem); + printk(BIOS_INFO, "Available memory below 4GB: %uM\n", tomk >> 10); /* Report the memory regions */ |