summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/gm45
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2016-11-18 09:29:03 -0700
committerMartin Roth <martinroth@google.com>2016-11-21 23:43:54 +0100
commit128c104c4d3b91d3371b03840af460d776af819d (patch)
treebb0621ae2c90b512948ba9fee350cf42a49f4db3 /src/northbridge/intel/gm45
parentc6ec8dd1cb2303f7f7a71f0f494a6fc30b93dff4 (diff)
nb/intel: Fix some spelling mistakes in comments and strings
Change-Id: I4a8297397d878e38516c8df19dd311c7ef19ec06 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/17478 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/gm45')
-rw-r--r--src/northbridge/intel/gm45/bootblock.c2
-rw-r--r--src/northbridge/intel/gm45/gm45.h2
-rw-r--r--src/northbridge/intel/gm45/raminit.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index fb40b9446a..10c64e9021 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -15,7 +15,7 @@ static void bootblock_northbridge_init(void)
* MCFG. This code also assumes that bootblock_northbridge_init() is
* the first thing called in the non-asm boot block code. The final
* assumption is that no assembly code is using the
- * CONFIG_MMCONF_SUPPORT_DEFAULT option to do PCI config acceses.
+ * CONFIG_MMCONF_SUPPORT_DEFAULT option to do PCI config accesses.
*
* The PCIEXBAR is assumed to live in the memory mapped IO space under
* 4GiB.
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 5a30f8788f..ae1863bdda 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -119,7 +119,7 @@ typedef struct {
unsigned int page_size; /* of whole DIMM in Bytes (4096 or 8192) */
unsigned int banks;
unsigned int ranks;
- unsigned int rank_capacity_mb; /* per rank in Mega Bytes */
+ unsigned int rank_capacity_mb; /* per rank in Megabytes */
} dimminfo_t;
/* The setup is one DIMM per channel, so there's no need to find a
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index 167ef24159..daddbabd22 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -198,7 +198,7 @@ void get_gmch_info(sysinfo_t *sysinfo)
/*
* Detect if the system went through an interrupted RAM init or is incon-
* sistent. If so, initiate a cold reboot. Otherwise mark the system to be
- * in RAM init, so this function would detect it on an erreneous reboot.
+ * in RAM init, so this function would detect it on an erroneous reboot.
*/
void enter_raminit_or_reset(void)
{